Digital Design RTL Engineer

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: The ideal candidate has a proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of RTL Design, PPA optimization, clock domain crossing (CDC) analysis and Reset Domain crossing (RDC). Beyond technical execution, you will collaborate cross-functionally with Architecture, Verification, and Physical Design teams to mitigate risks and ensure project milestones are met on schedule.…