Memory Layout Design Engineer

IND-Bangalore Electronic City - S1onsitemid

Posted today · via Workday

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About this role

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Job Requirements: Minimum 8+ years of experience with a Bachelor's degree or 6+ years of experience with a Master's degree, strong layout knowledge. Proficiency in using Cadence tools (Virtuoso Layout, Layout XL, Cadence Schematic Capture, and verification tools - Calibre & Hercules). Strong layout knowledge in advanced submicron FinFET processes, including TSMC 5nm, 3nm, 2nm, A14 or Samsung lower FinFET nodes. Key Responsibilities: Understand and apply layout guidelines, new process rules, and technical requirements for high-quality layouts.…

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This role is based in IND-Bangalore Electronic City - S1. We weight your proximity and willingness to relocate.

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