Senior/Principal Full-Chip Physical Verification Engineer
San Joseonsiteprincipal$150K – $250K
via Greenhouse
About this role
Celero Communications, Inc. is an exciting and fast-growing semiconductor startup developing high-performance coherent digital signal processors (DSPs) for optical interconnects used in large-scale AI infrastructure. Celero's goal is to enable higher-bandwidth, lower-power optical connectivity between AI clusters and data centers.
We are seeking a Senior/Principal Full-Chip Physical Verification Engineer to join our Physical Design team and help deliver complex digital blocks and full-chip implementations in advanced process technologies. This role will own all aspects of Physical Verification execution on advanced TSMC nodes, ensuring design quality, manufacturability, and tapeout readiness.…
Read the full description on Celerocommunicationsinc's site →
What we'd score you on
reqspace match rubricFive dimensions, recruiter-grade. Upload your resume and we'll generate a written explanation of where you fit and where the gaps are.
1
Skills match
For this role: python, shell, teams
2
Level fit
This role is principal-level. We check your trajectory against it.
3
Domain experience
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4
Recency
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5
Location fit
This role is based in San Jose. We weight your proximity and willingness to relocate.
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Skills in this role
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