CPLD Engineer
TW - Taipei City - Suite C7Fonsitemid
Posted yesterday · via Workday
About this role
About The Role The Staff CPLD Engineer will be responsible for CPLD/FPGA architecture design, development, validation, and maintenance for server platforms. This role works closely with Electrical Engineering, BMC, BIOS, and cross-functional teams to deliver robust hardware control solutions and implement innovative design concepts. The engineer will also drive power sequencing logic development, issue resolution, and continuous improvements throughout the product lifecycle. What You Will Do Work closely with EE, BMC, and BIOS teams for CPLD/FPGA design, validation, debugging, and maintenance. Develop and maintain server production power-on sequence control logic using CPLD/FPGA.…
What we'd score you on
reqspace match rubricFive dimensions, recruiter-grade. Upload your resume and we'll generate a written explanation of where you fit and where the gaps are.
1
Skills match
For this role: go, teams
2
Level fit
This role is mid-level. We check your trajectory against it.
3
Domain experience
Your work in the role's domain matters more than your years total. We weight recent and direct experience.
4
Recency
A skill you used last quarter weighs more than one from five years ago. We grade on recency, not lifetime.
5
Location fit
This role is based in TW - Taipei City - Suite C7F. We weight your proximity and willingness to relocate.
Score yourself on this role.
Free · no card · written explanation included
Skills in this role
Pulled from the job description. These are the keywords we'll weight when scoring your fit.
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