Memory Design Engineer
USonsitemid$91K – $173K
Posted today · via Workday
About this role
Job Details: Job Description: Intel's Corporate Memory Organization (CMO) within Design Technology Platform (DTP) drives development of Memory Compilers on Intel's leading-edge process technologies. The organization is responsible for architecting, designing and delivering high-performance and energy-efficient embedded memory IP that maximize silicon performance, optimize density, and maximize manufacturing yield across Intel Products and Intel Foundry platforms. As a Circuit Design Engineer in CMO, you will be responsible for architecting, designing, and delivering SRAM compilers across high-density (HD) and high-performance (HP) profiles.…
What we'd score you on
reqspace match rubricFive dimensions, recruiter-grade. Upload your resume and we'll generate a written explanation of where you fit and where the gaps are.
1
Skills match
For this role: python, perl, split
2
Level fit
This role is mid-level. We check your trajectory against it.
3
Domain experience
Your work in the role's domain matters more than your years total. We weight recent and direct experience.
4
Recency
A skill you used last quarter weighs more than one from five years ago. We grade on recency, not lifetime.
5
Location fit
This role is based in US. We weight your proximity and willingness to relocate.
Score yourself on this role.
Free · no card · written explanation included
Skills in this role
Pulled from the job description. These are the keywords we'll weight when scoring your fit.
pythonperlsplit
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