Digital Verification Engineer
San Diegoonsitemid
Posted 106mo ago · via Smartrecruiters
About this role
About Mindlance is a national recruiting company which partners with many of the leading employers across the country. Feel free to check us out at http://www.mindlance.com. · 3years minimum experience and working knowledge of Object-Oriented SystemVerilog principles using UVM/OVM/VMM methodologies. · Extensive hand on experience in verifying digital blocks, building UVM based TB, writing UVM sequences, constraint-random testcases, using regModel (UVM_REG) API, drivers, monitors, scoreboard, functional coverage, assertions (SVA), simulations, regression, debug, bug reporting/tracking. · Experience in debugging RTL & Gate level simulations · Part of multiple tapeouts with high quality verification.…
What we'd score you on
reqspace match rubricFive dimensions, recruiter-grade. Upload your resume and we'll generate a written explanation of where you fit and where the gaps are.
1
Skills match
We compare your skills against the role requirements.
2
Level fit
This role is mid-level. We check your trajectory against it.
3
Domain experience
Your work in the role's domain matters more than your years total. We weight recent and direct experience.
4
Recency
A skill you used last quarter weighs more than one from five years ago. We grade on recency, not lifetime.
5
Location fit
This role is based in San Diego. We weight your proximity and willingness to relocate.
Score yourself on this role.
Free · no card · written explanation included
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