RTL Design Engineer

About About Mirafra : Mirafra is software service base organization started in 2004. We are 500+ employees in India and 250+ In US Clear visibility to senior management which helps for constant professional growth A minimum of 5 years of experience with the following skills. - Design and verification experience including micro architecture, RTL design and test planning - Timing closure experience including timing constraints and PTSI. - Prior experience in digital and mixed signal circuit design for high speed PHYs - Hands-on experience with SystemVerilog/Verilog, DFT insertion, and timing closure - Hands-on experience with HVLs and Testbench architectures - Exposure to high speed custom building blocks, such as, IOs, PLLs, DLLs, LDOs, etc.…