Senior ASIC Verification Engineer - PMU

As chip sizes continue to grow, power efficiency has become critical across all NVIDIA products - from data centers to automotive and personal computing. Our PMU IP, developed over the past 17 years, is crucial in optimizing chip performance and efficiency in both idle and active scenarios. The PMU IP consists of a RISC-V core and custom-designed control logic. It collects and processes data from the entire chip, working in tandem with software running on the RISC-V core to determine optimal operating points. We are seeking a Senior Asic Verification Engineer who can verify complicated system. What you’ll be doing: Collaborate with the Design and Arch to settle down the verification scope Learn how PMU's function impacts the system and support the silicon debug.…