DFT Verification intern

Tianjin (Teda)onsitejunior

Posted today · via Workday

About this role

Job Responsibility: -Contribute to SoC DFT design activities by running DFT pattern simulations, static and dynamic checks and documentation. -Assist with DFT AI Flow development under guidance from senior engineers. -Contribute to engineering quality, learning, and teamwork throughout the development cycle. Requirements: -Currently pursuing a Master’s degree in Electrical Engineering, Electronics, Computer Engineering, Computer Science or a related discipline. -Hands-on experience from ASIC EDA tools, SoC design projects, internships, coursework, or student competitions is a plus. -Familiar with SoC digital design, verification, programming, EDA tools; willingness to learn quickly is important.…

Read the full description on Nxp's site →

What we'd score you on

reqspace match rubric

Five dimensions, recruiter-grade. Upload your resume and we'll generate a written explanation of where you fit and where the gaps are.

1

Skills match

For this role: teams

2

Level fit

This role is junior-level. We check your trajectory against it.

3

Domain experience

Your work in the role's domain matters more than your years total. We weight recent and direct experience.

4

Recency

A skill you used last quarter weighs more than one from five years ago. We grade on recency, not lifetime.

5

Location fit

This role is based in Tianjin (Teda). We weight your proximity and willingness to relocate.

Score yourself on this role.
Free · no card · written explanation included
See if I'm a fit →

Skills in this role

Pulled from the job description. These are the keywords we'll weight when scoring your fit.

teams

More at Nxp

See all open jobs at Nxp