Lead Physical Design Engineer

Puneonsitesenior

Posted today · via Workday

About this role

We are seeking a highly skilled and experienced Synthesis & STA Engineer with ~10 years relevant experience. This role involves leading and executing RTL Synthesis & Static Timing Analysis (STA) for complex SoC designs of next-generation semiconductor products. Job Responsibilities * Lead and perform RTL Synthesis & comprehensive Static Timing Analysis (STA) at the block, sub-system, and SoC levels for cutting-edge semiconductor designs. * Develop, integrate, and maintain timing constraints (SDC) for various design hierarchies, ensuring accuracy and coverage. * Identify, debug, and resolve complex timing violations, including setup, hold, and other advanced timing checks (e.g., OCV, AOCV, EMIR, X-talk).…

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2

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3

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4

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