Verification Engineering Lead/Manager
Hyderabadonsitemanager
Posted 21mo ago · via Lever
About this role
The position involves designing, developing and deploying UVM based Testbenches for multi-core, multi-threaded processor subsystems with emphasis on verifying and signing off performance and power along with functionality for mixed signal SOC. The candidate should have worked on architecture of chip-level testbenches and verification of SoCs and chipsets with ARM/RISC-V processor technology and AMBA AHB/AXI/APB along with high-speed interfaces like PCIe, MIPI, USB, Ethernet, Mobile DDR and Quad/Octa-SPI and peripheral interfaces like SDIO, UART, I2S, I2C, PWM, QEI, CAN, Ethernet, PCIe, UCIe as well as Mixed Signal AMS simulation environment.
What we'd score you on
reqspace match rubricFive dimensions, recruiter-grade. Upload your resume and we'll generate a written explanation of where you fit and where the gaps are.
1
Skills match
We compare your skills against the role requirements.
2
Level fit
This role is manager-level. We check your trajectory against it.
3
Domain experience
Your work in the role's domain matters more than your years total. We weight recent and direct experience.
4
Recency
A skill you used last quarter weighs more than one from five years ago. We grade on recency, not lifetime.
5
Location fit
This role is based in Hyderabad. We weight your proximity and willingness to relocate.
Score yourself on this role.
Free · no card · written explanation included
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