Physical Design Engineer, Senior to Staff Level
Taipeionsitesenior
Posted 8mo ago · via Eightfold
About this role
Company: Qualcomm Semiconductor Limited Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: The Physical Design Engineer is responsible for the complete physical implementation of complex digital integrated circuits (ASICs/SoCs) from netlist to GDSII. This role involves turning logical circuit designs into physical layouts that meet timing, power, area, and reliability constraints. Key Responsibilities Netlist-to-GDSII Implementation: Execute the full physical design flow including Floorplanning, Power Planning, Placement, Clock Tree Synthesis (CTS), and Routing. Timing Analysis & Closure: Perform Static Timing Analysis (STA) to identify and fix setup/hold violations across various process corners and modes (PVT).…
What we'd score you on
reqspace match rubricFive dimensions, recruiter-grade. Upload your resume and we'll generate a written explanation of where you fit and where the gaps are.
1
Skills match
For this role: perl, shell, rest
2
Level fit
This role is senior-level. We check your trajectory against it.
3
Domain experience
Your work in the role's domain matters more than your years total. We weight recent and direct experience.
4
Recency
A skill you used last quarter weighs more than one from five years ago. We grade on recency, not lifetime.
5
Location fit
This role is based in Taipei. We weight your proximity and willingness to relocate.
Score yourself on this role.
Free · no card · written explanation included
Skills in this role
Pulled from the job description. These are the keywords we'll weight when scoring your fit.
perlshellrest
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