Design Verification Engineer- AI Accelerator Lead
Santa Claraonsitesenior
Posted 2mo ago · via Lever
About this role
Role Overview
We are looking for talented Design Verification Engineers to help verify and deliver Velaura's next generation Physical AI SoC. You will work closely with architects, RTL engineers, software engineers and system teams to establish confidence in the correctness, performance, reliability and safety of the design, from individual RTL blocks through complete hardware and software systems running real workloads.
This role focuses on our AI acceleration units. We are designing custom compute engines from scratch to deliver industry leading inference performance at best in class energy efficiency, and every gain has to come inside a tight power envelope.…
What we'd score you on
reqspace match rubricFive dimensions, recruiter-grade. Upload your resume and we'll generate a written explanation of where you fit and where the gaps are.
1
Skills match
For this role: teams
2
Level fit
This role is senior-level. We check your trajectory against it.
3
Domain experience
Your work in the role's domain matters more than your years total. We weight recent and direct experience.
4
Recency
A skill you used last quarter weighs more than one from five years ago. We grade on recency, not lifetime.
5
Location fit
This role is based in Santa Clara. We weight your proximity and willingness to relocate.
Score yourself on this role.
Free · no card · written explanation included
Skills in this role
Pulled from the job description. These are the keywords we'll weight when scoring your fit.
teams
More at Velaura
- View →Sr Engineer CAD Pre-Silicon Front End - BangaloreBangalore
- View →Functional Safety Architect - BangaloreBangalore
- View →AI Systems Architect (Models & Hardware Co-Design) - BangaloreBangalore
- View →SoC Design Verification Engineer - BangaloreBangalore
- View →Senior Formal Verification Engineer - BangaloreBangalore
- View →Senior Design Verification Engineer - BangaloreBangalore