SoC Design Verification Lead

Santa Claraonsitesenior

Posted 1mo ago · via Lever

About this role

Role Overview We are looking for an experienced verification leader to help verify and deliver Velaura's next generation Physical AI SoC. You will work closely with architects, RTL engineers, software engineers and system teams to establish confidence in the correctness, performance, reliability and safety of the design, from individual RTL blocks through complete hardware and software systems running real workloads. This role leads system level verification. You will own the SoC verification plan and carry it through sign off and into tape out, covering boot and root of trust, clock and reset topology, low power behavior, and the IO and memory subsystems. You will set technical direction for a small team while staying hands on in the environment yourself.

Read the full description on Velaura's site →

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reqspace match rubric

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1

Skills match

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2

Level fit

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3

Domain experience

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4

Recency

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5

Location fit

This role is based in Santa Clara. We weight your proximity and willingness to relocate.

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