Principal Engineer Design

We are seeking a highly motivated Principal Engineer Design to lead the physical implementation and timing closure of advanced low-power SoCs targeting the IoT and MCU markets. This role offers the opportunity to drive end-to-end physical design execution, optimize power, performance, and area (PPA), and influence methodology improvements that enable successful silicon delivery. The ideal candidate will possess deep expertise in physical design, timing convergence, low-power implementation methodologies, and signoff processes while demonstrating strong technical leadership and cross-functional collaboration skills. Your role Key responsibilities in your new role Lead physical design and timing closure for complex low-power SoCs targeting IoT and MCU applications.…