I
InfineonES ICW ENG CMCU AIP BLR

Staff Engineer Design

Bangalore BTPonsitestaff

Posted 1mo ago · via Eightfold

About this role

Passionate about PLLs, DLLs, Oscillators, Clock Generation, and Silicon Debug ? Join our team to develop next-generation Analog and Mixed-Signal IPs for cutting-edge semiconductor products. If you have 5–8 years of experience in Analog IC Design and enjoy solving complex design challenges, we'd love to hear from you! #Hiring #AnalogDesign #MixedSignal #PLL #DLL #Oscillator #Semiconductor #VLSI #StaffEngineer Your role Key responsibilities in your new role Design and develop Analog/Mixed-Signal Clock IPs from specification to silicon validation. Contribute to the design of RC Oscillators, Crystal Oscillators, PLLs, DLLs, Precision Comparators, Reference Circuits, Regulators, and Signal Chains .…

Read the full description on Infineon's site →

What we'd score you on

reqspace match rubric

Five dimensions, recruiter-grade. Upload your resume and we'll generate a written explanation of where you fit and where the gaps are.

1

Skills match

For this role: teams

2

Level fit

This role is staff-level. We check your trajectory against it.

3

Domain experience

Your work in the role's domain matters more than your years total. We weight recent and direct experience.

4

Recency

A skill you used last quarter weighs more than one from five years ago. We grade on recency, not lifetime.

5

Location fit

This role is based in Bangalore BTP. We weight your proximity and willingness to relocate.

Score yourself on this role.
Free · no card · written explanation included
See if I'm a fit →

Skills in this role

Pulled from the job description. These are the keywords we'll weight when scoring your fit.

teams

More at Infineon

See all open jobs at Infineon →