Senior Mixed Signal Post Silicon Validation Engineer IOs
USonsitesenior$142K – $200K
Posted today · via Workday
About this role
Job Details: Job Description: About the Team The Hard IP Development Group (HIPD) within Intel's Central Engineering Organization is responsible for developing leadership IPs that are power-winning products for Server, Client, and Networking SOCs, as well as Intel Foundry Customers. HIPD develops a broad portfolio of Serial and Parallel IO PHYs including PCIe, USB, TypeC, UCIe Die-to-Die, DDR/LPDDR, and Ethernet PHYs. The Electrical Validation and Debug group within HIPD is a dynamic and versatile team of engineers who directly engage with both IP design teams and SOC customers in IP validation and debug for test chips and products. These engineers embody our SOC customer obsession by validating mixed signal IPs and quickly resolving hurdles through hands-on debug.…
What we'd score you on
reqspace match rubricFive dimensions, recruiter-grade. Upload your resume and we'll generate a written explanation of where you fit and where the gaps are.
1
Skills match
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2
Level fit
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3
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4
Recency
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5
Location fit
This role is based in US. We weight your proximity and willingness to relocate.
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